When writing data to a non-volatile flash memory having a multi-level cell (MLC) configuration, the process is typically accomplished by storing each of the plurality of bits for a cell in random access memory (RAM) in the memory controller, for all the cells in complete world line in the flash memory, and then proceeding with a multiple stage programming process for injecting charge into each multi-bit cell to achieve the programmed state desired for that cell. As part of this multiple step flash programming process, and for each of the multiple programming steps, the RAM in the controller will typically store a copy of all the host data bits to be programmed in a cell and process the ECC and encoding of the bits to be written to the memory cell and then transfer the processed portion of the encoded bits. For example, in a three programming stage process for a three bit-per-cell MLC memory cell, three copies of the three host bits destined for each MLC memory cell may be stored in RAM in the controller and the controller may separately process and transfer three bits to the non-volatile memory for each programming stage. This would result in nine separate bits being stored in controller RAM and nine bits, three for each programming stage, being processed and sent to the flash memory over the three programming stages. By repeatedly retrieving and processing the original data for each pass of the multiple step programming process, controller resources and power is consumed, potentially reducing the overall performance of the flash memory.